Image from Google Jackets

Normal view MARC view ISBD view

VERYLOG HDL SYNTHESIS

By:

J.BHASKAR

Material type: Text

Text

TextPublication details: B.S.PUBLICATIONSDescription: 215

Tags from this library: No tags from this library for this title. Log in to add tags.

Average rating: 0.0 (0 votes)

Holdings ( 10 )
Comments ( 0 )

Holdings
Item type	Current library	Collection	Call number	Status	Date due	Barcode
General Books	JBIET Library Computer Science & Engineering	B.Tech		Available		47764
General Books	JBIET Library Computer Science & Engineering	B.Tech		Available		47765
General Books	JBIET Library Computer Science & Engineering	B.Tech		Available		47766
General Books	JBIET Library Computer Science & Engineering	B.Tech		Available		47767
General Books	JBIET Library Computer Science & Engineering	B.Tech		Available		47768
General Books	JBIET Library Computer Science & Engineering	B.Tech		Available		47769
General Books	JBIET Library Computer Science & Engineering	B.Tech		Available		47770
General Books	JBIET Library Computer Science & Engineering	B.Tech		Available		47771
General Books	JBIET Library Computer Science & Engineering	B.Tech		Available		47772
General Books	JBIET Library Computer Science & Engineering	B.Tech		Available		47773

There are no comments on this title.

to post a comment.

Share

J.B. Institute of Engineering & Technology

Bhaskar Nagar, Moinabad Mandal, R.R. District, Hyderabad, Telangana State, India-500075.

Phone : +91-9492759646 | Email : librarian@jbiet.edu.in | Web : http://www.jbiet.edu.in

Implemented & Customized by: BestBookBuddies

Powered by Koha